Linear Regulator IP, Input: 1.0V - 3.6V, Output: 0.9V/20mA, Standby Current: 0.8uA, UMC 55nm ULP process
Overview
1.0~3.6V input, loading 20mA, 0.9V output with VBG=0.75V Linear Regulator, UMC 55nm ULP/UHVT Low-K Logic Process
Technical Specifications
Foundry, Node
UMC 55nm ULP
UMC
Pre-Silicon:
55nm
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