JPEG 2000 HD 60P Encoder
Overview
The JPEG 2000 Broadcast family has been designed to respond to the various applications of the Broadcast markets. We guarantee perfect interoperability with every SD and HD standards in terms of frame rates and resolutions. Its modules provide, in a single FPGA, multi-channel operations representing a total of 240 full resolution progressive frames per second, real time.
Key Features
- 1 HD 30p / 50i / 59,9i / 60i channel
- Visually lossless compression
- Xilinx 7 Series FPGA (Zynq-7, Artix-7, Kintex-7, Virtex-7), Xilinx Virtex-6 & Spartan-6
- Altera Cyclone V, Arria II & V, Stratix IV and V
- Max codestream bitrate; Lower bitrate supported; Bitrate can be shared unequally per channel: 250 Mbps
- Max pixel rate ; Lower pixel rate supported: 70 Mpixels/s
- Max pixels per line; Lower pixels per line supported: 1920 pixels/line
- Max bit depth per component ; Lower bit depth supported: 10 Bits/comp.
- Latency:
- Low Latency(2 + 1 frames)
- Ultra-low Latency(<1 frame)
- Color Space: YUV or RGB
- Chrominance subsampling:
- 4:4:4 (Option)
- 4:2:2
Benefits
- Full flexibility between
- Up to 4 simultaneous channels
- 1 channel up to 1080p, 120 fps
- Visually Lossless
- Single chip
- Ultra Low Latency Option
Applications
- Camera built-in recorder
- Field recorder
- Post-production video server
- Contribution transceiver/receiver
- Live event transmitter
- SMPTE2022 1/2 (JPEG2000 wrapped in MPEG2-TS )
- AVB