IP Platform for Multiprotocol IoT Gateway

Overview

The LP1-300 IP Platform is a rich gateway platform for IoT. It consists of a Bluetooth 5.2 Low Energy and BR-EDR Controllers and an 802.15.4 MAC and PHY layers. It also includes a sensor fusion IP, a low power Neural Net Processor. The LP1-300 IP Platform is designed to bring secure wireless connectivity to various IoT application, including smart home, automotive, industrial IoT and consumer electronics.
The LP1-300 IP Platform is fully integrated and is portable to different embedded processors. It can be smoothly integrated into an SoC or used as the main foundation of a standalone SoC.

Key Features

  • LE 5.2 CONTROLLER :
    • GFSK modem @ 2.4GHz (1M Uncoded PHY, 2M Uncoded PHY, 1M Coded PHY)
    • Bitstream Processing (FEC convolutional encoder/decoder, Data whitening, CRC, AES CCM)
    • Constant Tone Extension (IQ Sampling)
    • Channel Selection Algorithm for connection events and sub events
    • Broadcast Isochronous Stream
    • Connection Supervision
    • Link Layer Firmware and HCI
  • BR-EDR CONTROLLER :
    • Basic rate
    • Enhanced Data rate
    • Bitstream Processing (FEC 1/3 and 2/3 coding rates, FEC convolutional, Data whitening, CRC, HEC, Access Code Generation, AES CCM))
    • Connection Supervision
    • ESCO support
    • Link Manager Firmware and HCI
  • IEEE 802.15.4 CONTROLLER :
    • BPSK (20 Kbps @ 868 MHz, 40 Kbps @ 915 MHz
    • OQPSK (250 Kbps @2450 MHz/2380 MHz, 250 Kbps @ 915 MHz, 100 Kbps @ 868 MHz)
    • GFSK (100 Kbps @968 MHz)
    • Other optional modulation support
    • Bitstream processing (Channel coding, CRC, AES-CCM)
    • MAC Firmware
  • NEURAL NETWORK PROCESSOR :
    • Fully programmable
    • Int16
    • Fixed Point
    • FP16
    • Built-in prescaling and denormalization
  • SENSOR FUSION :
    • Kalman Filter Accelerator
    • Convolutional Neural Network
  • SECURITY ACCELERATOR :
    • Protocol Supported : ECDHE, ECDSA
    • Acceleration units : ECC-233, SHA256, AES 128
    • TRNG
  • AMBA standard interface : AXI/AHB/APB

Benefits

  • Power and area-optimized
  • Fully integrated for better portability to different embedded processors, including ARM and RISCV
  • Built for smooth integration into an SoC or used as the main foundation of a standalone SoC
  • Support for highly-differentiating products at a lower cost and time-to-market
  • Complete UVM Verification environment
  • End-to-end FPGA Validation Platform validated with qualified certification tools

Applications

  • Smart Home
  • Automotive
  • Industrial IoT
  • Consumer Electronics

Deliverables

  • Delivered as Soft or Hard IP
  • Link Layer, Link Controller, MAC Firmware and HCI
  • FPGA Validation Platform
  • UVM Test Bench
  • Technical Specifications
  • Integration Manual

Technical Specifications

Foundry, Node
Any
Availability
Available
×
Semiconductor IP