Interrupt controller with APB interface
Key Features
- APB bus
- Support up to 32 fast interrupt (FIQ) inputs by configuration
- Support up to 32 standard interrupt (IRQ) inputs by configuration
- Provide both edge and level triggered interrupt source with positive and negative directions.
- Support de-bounce circuit for interrupt input sources by configuration
Technical Specifications
Related IPs
- ISO/IEC 7816-3 digital controller for interface device compliant with ETSI TS 102 221 and EMV 2000 standards
- Spacewire Codec with AHB host interface
- APB Interrupt Controller
- Single Wire Protocol (SWP) slave digital controller compliant with the ETSI 102.613 standard
- ISO/IEC 7816-3 digital controller for integrated circuit card compliant with ETSI TS 102 221 and EMV 2000 standards
- I3C Master / Slave Controller w/FIFO (APB Bus)