I2S/TDM Serial Audio Interface with Asynchronous Sample Rate Conversion

Overview

The IPB-I2S-TDM-ASRC combines an I2S/TDM configurable serial audio interface with two embedded stereo Asynchronous Sample Rate Converters (ASRCs).

The ASRCs can provide very high quality in terms of harmonic distortion and noise, tolerance and rejection of input jitter. When sample rate conversion is not necessary, the ASRCs can be bypassed.

The I2S/TDM supports the well-known stereo formats: I2S, Left-Justified or Right-Justified and many configurable TDM formats up to 256 channels.

The backend interface is supplied with a choice of AMBA-AHB, AMBA-APB or a parallel interface.

Key Features

  • ASRC FEATURES:
    • 2-channel audio sample rate converter
    • Sample size: up to 24 bits
    • Lower than -130 dB THD+N for common conversion ratios
    • Fast synchronization time: 128 input samples
    • Latency: 64/FSin + 2/FSout
    • Automatically adjusts to changes in both input and output sample rates
    • High input jitter tolerance
    • Input/output sample rate range: 8 kHz to 192 kHz
    • Sampling rate conversion ratios: 3.9 : 1 : 7
    • Features customized upon request
  • I2S/TDM FEATURES:
    • Runtime configurable serial audio formats: I2S, left-justified, right-justified or TDM
    • Supports all commonly used sample rates including (but not limited) 8, 11.025, 16, 22.05, 32, 44.1, 48, 96, and 192 kHz
    • Audio sample sizes: 8, 16, 24 or 32 bits
    • Supports slave or master modes
    • Supports up to 256 audio channels

Benefits

  • Integrating this unique component will eliminate a discrete component in the bill of materials
  • Support for both FPGA and ASIC with seamless transition
  • Configurable architecture allows features to be changed upon request

Block Diagram

I2S/TDM Serial Audio Interface with Asynchronous Sample Rate Conversion Block Diagram

Deliverables

  • Verilog source code or FPGA netlist
  • Verilog testbench for RTL simulation
  • Synthesis constraints
  • Datasheet

Technical Specifications

Foundry, Node
All
Maturity
Silicon and FPGA proven
Availability
Now
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Semiconductor IP