The Arasan I2S Controller IP Core is a two-channel I2S serial audio controller compliant to the Philips* Inter-IC Sound specification. The I2S bus is used for connecting audio components such as speakers, DACs, or audio subsystems. The Arasan I2S Controller IP Core provides a 32-bit parallel processor bus as the application interface.
The controller’s I2S interface consists of one transmitter and one receiver. Each channel can be programmed as an I2S master or an I2S slave. The Bit Clock (BLCK) and Left and Right Clock (LRCK) provide synchronization for the transmit and receive data. The I2S Controller IP supports 44.1KHz audio sampling rates. DAC/ADC resolution is configurable from 8-bit to 32-bit.
I2S Controller IP Core- Two Channel
Overview
Key Features
- Complies with Philips* I2S Specification
- Supports two I2S channels
- Simultaneous audio playback and recording
- Supports configurable 8/16/24/32 bit DAC/ADC resolution
- Supports 44.1KHz audio sampling frequencies
- 32-bit parallel processor bus
- Interrupt support for FIFO transfers
- Supports 256 sampling frequency operating modes
Benefits
- Fully compliant core Premier direct support from Arasan IP core designers
- Easy-to-use industry standard test environment
- Un-encrypted source code allows easy implementation
- Reuse Methodology Manual guidelines (RMM) compliant verilog code ensured
Deliverables
- Synthesizable RTL
- Synthesis scripts
- Test environment
Technical Specifications
Maturity
Silicon Proven
Availability
Now