High Performance NVMe for PCIe-based storage

Typical storage controllers are composed of a communication interface and a Nandflash controller. In this case, all the data flow is managed by the external host processor. However, this architecture cannot sustain high performance applications. The NVMe IP core  is a powerful data transfer manager integrated into the PCIe SSD Controller between the communication interface and the Nandflash controller, therefore off-loading the host CPU. The NVMe IP is UNH-IOL NVM Express compliant.

This is the NVM Express demo from IP-Maker demonstrated at Flash Memory Summit 2012, Santa Clara, CA. The NVMe IP is integrated in a FPGA-based board including all the mandatory features of the NVM Express specification 1.0d. NVMe protocol is observed wit

This is the NVM Express demo from IP-Maker demonstrated at Flash Memory Summit 2012, Santa Clara, CA. The NVMe IP is integrated in a FPGA-based board including all the mandatory features of the NVM Express specification 1.0d. NVMe protocol is observed with a protocol analyzer from Teledyne Lecroy.