High performance FFT with Gsps throughput

Overview

The eSi-FFT-Gsps is an advanced FFT design tailored for high-throughput applications, specifically design to seamlessly integrate with high sampling rate data converters.

The architecture is capable of supporting core clock rate of greater than 1 GHz delivering a throughput of greater than 8 Gsps, The IP can be configured to deliver much higher throughput in advanced technology nodes.

Designed for optimal performance and power efficiency, this FFT IP is tuned to meet the stringent demands of cutting-edge LiDAR, Radar and communication applications.

EnSilica has a comprehensive range of FFT IP cores, these cores can be configured to replace the AMD FFT LogiCORE™ IP or FFT Intel® FPGA IP Core when migrating an FPGA design to ASIC technology.

Key Features

  • Throughput of greater than 8Gsps with 1GHz core clock frequency
  • Architecture can be scaled to support higher throughput per clock cycle
  • Configurable to supports large transform sizes i.e >8k
  • Support back-to-back FFT transforms
  • Per sample exponent for maximum dynamic range
  • Parameterized maximum transform length
  • Parameterized bit widths
  • Options to deliver full spectrum or half spectrum output
  • AXI4 streaming interface

Benefits

  • Compact area and low-power
  • Designed to deliver high throughputs even using mainstream technology nodes
  • Optimised for advanced LiDAR and Radar throughput requirements
  • Developed with a ISO-26262 design flow
  • Common code for FPGA and ASIC simplifies prototyping
  • Can be parameterized for exact requirements
  • Delivered with memories ported to your technology node

Applications

  • Radar and LiDAR
  • High bandwidth communication systems
  • mmWave backhaul modems
  • Test equipment

Deliverables

  • RTL
  • Testbench
  • Synthesis scripts
  • Documentation
  • MATLAB and C++ bit exact model

Technical Specifications

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Semiconductor IP