HASH Core, providing MD5, SHA1 and SHA256. Includes DMA and AXI Interface

Overview

This is a high performance, small footprint HASH IP Core. It supports three HASH algorithms: MD5, SHA1, SHA256. A S/G DMA engine keeps the core running. Each hash engine has it’s own dedicated clock, which is independent of the main AXI clock.

Key Features

  • Supports MD5, SHA1 and SHA256
  • High Performance S/G DMA engine
  • Fully AXI-4 compatible
  • AXI-Light for register Interface
  • Separate clocks for MD5, SHA and SHA256 engines and AXI interface

Benefits

  • High Performance, small footprint

Deliverables

  • Verilog Source Code
  • Test bench
  • Tech Support

Technical Specifications

Foundry, Node
any
Maturity
Silicon Proven
Availability
now
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Semiconductor IP