GSMC 0.25um 2.5V/3.3V PCI I/O Cell Library

Overview

VeriSilicon GSMC 0.25um 2.5V/3.3V PCI I/O Cell Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.25um logic 1P5M 2.5V/3.3V process. This library can take 5V tolerance. This library supports both Stagger I/O pads and Inline I/O pads.

Key Features

  • GSMC 0.25umogic 1P5M Salicide 2.5V/3.3V process
  • 2.5V core and 3.3V external interface
  • Meets the revision 2.2 of PCI local bus specification
  • Cell count: 6 cells
  • Suitable for four or five metal layers of physical design
  • Easy interface with VeriSilicon GSMC 0.25um process standard I/O libraries
  • More details, please go to below website to contact VeriSilicn Location sales:http://www.verisilicon.com/en/contactus.asp

Technical Specifications

Foundry, Node
GSMC 0.25um
Availability
Now
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Semiconductor IP