GSMC 0.15um 1.5V/3.3V PCI I/O Cells Library

Overview

VeriSilicon GSMC 0.15um 1.5V/3.3V PCI I/O Cell Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.15um logic 1P7M 1.5V/3.3V process. This library can take 5V tolerance. This library supports both Stagger I/O pads and Inline I/O pads.

Key Features

  • GSMC 0.15um Logic 1P7M Salicide 1.5V/3.3V process
  • 1.5V core and 3.3V external interface
  • Meets the revision 2.2 of PCI local bus specification
  • Cell count: 6 cells
  • Suitable for four, five and six metal layers of physical design
  • Easy interface with VeriSilicon GSMC 0.15um process standard I/O libraries

Technical Specifications

Foundry, Node
GSMC 0.15um
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Semiconductor IP