We may propose our System on Chip design, based on Gaisler Research Leon 3 CPU integrated with our GNSS Engine. The number of GNSS channels is a parameter that may be tuned for the certain application. Our evaluation board includes two RF front-end chips and inertial sensors (gyroscope and accelerometer). The SoC is powered by our proprietary FW that provides BIOS functionality for Leon and that locks our navigation channels tracking and measurement loops.
GPS/Galileo/GLONASS System on Chip based on "Leon 3" CPU
Overview
Key Features
- You may choose any number of acquisition/tracking channels for your system, the only limitation would be your CPU performance. The default configuration with 32 channels includes:
- 12 channels GPS L1/CA
- 12 chanels GLONASS L1/CA
- 2 channels SBAS L1
- 6 channels Galileo E1
- Our evaluation board includes following ICs MEMS:
- 3-axis gyroscope
- 3-axis accelerometer
Benefits
- A system is easily modified and tuned, with super short integration period.
- An architecture is ARM-compatible.
Technical Specifications
Related IPs
- Fourth-Generation, High-Performance CPU Based on DynamIQ Technology
- Decision tree ensemble evaluation core based on serial evaluation of ensemble members
- Decision tree ensemble evaluation core based on parallel evaluation of ensemble members
- Area-efficient decision tree ensemble evaluation core based on serial evaluation of ensemble members
- Area-efficient decision tree ensemble evaluation core based on parallel evaluation of ensemble members
- SATA HOST 3 ON VIRTEX 7 GTH