DVB-RCS2 Multi-Carrier Receiver

Overview

DVB-RCS2 (Digital Video Broadcast – Second Generation DVB Interactive Satellite System) is the latest ETSI standard of the second generation for digital data transmission via satellites.
The Creonic DVB-RCS2 Multi-Carrier Receiver supports multiple frequency time domain multiple access (MF-TDMA), performs all tasks of an DVB-RCS2 receiver including carriers separation, baseband conversion, demodulation, and turbo decoding. It can process intermediate frequency (IF) real signal with center IF frequencies between 0 and 100 MHz.

The Creonic turbo decoder is included in the receiver to provide users with Frame PDUs at the output.

Key Features

  • Compliant with ETSI EN 301 545-2 (DVB-RCS2)
  • Support for Linear Modulation Bursts of Table A-1
  • Optional support for Spread-spectrum
  • Linear Modulation Bursts waveforms of Table A-2
  • Support for BPSK, QPSK, 8-PSK,16-QAM
  • Supports real, intermediate frequency signal at input.

Benefits

  • Supports MF-TDMA using the DVB-RCS2 protocol.
  • The receiver performs multi-carrier processing, in-cluding gain adjustment, timing correction, decimation, filtering, bursts synchronization, derotation, decrambling, phase and frequency correction, DVB-RCS2 deframing, turbo decoding, and CRC-16 / CRC-32 checks.
  • On-the-fly reconfiguration of superframe and number of active carriers.
  • Configurable amount of turbo decoder iterations.
  • Low-power and low-complexity design.
  • AXI4-Lite interface for controlling and for retrieving sta-tus information.
  • Collection of statistics (error rates, superframe and timeslot counters, frequency and timing offsets, signal-to-noise ratio (SNR)).
  • Validated on Xilinx RFSoC board with the Creonic DVB-RCS2 modulator
  • Available for ASIC and FPGAs (Xilinx, Intel).

Block Diagram

DVB-RCS2 Multi-Carrier Receiver Block Diagram

Applications

  • Satellite communication (Digital Video Broadcasting, Interactive Services, Professional Services, News Gathering)

Technical Specifications

Availability
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Semiconductor IP