DO-254 Local Memory Bus (LMB) 1.00a
Overview
The LMB is a fast, local bus for connecting MicroBlaze™ instruction and data ports to high-speed peripherals, primarily on-chip block RAM (BRAM). (Actual memory that is controlled by the above.)
Key Features
- Efficient, single master bus (requires no arbiter)
- Separate read and write data buses
- Low FPGA resource utilization
- 125 MHz operation
- Delivered with the Embedded Development Kit
Benefits
- Mature source IP has been re-engineered for full DAL-A compliance for airworthiness and design assurance for safety-critical programs, supporting and simplifying the compliance effort at the FPGA level.
Deliverables
- Encrypted source along with a complete certification data package (CDP) including all artifacts required for chip-level compliance.
Technical Specifications
Availability
March 2014