DO-254 AXI Universal Asynchronous Receiver Transmitter (UART) 16550 1.00a

Overview

Connects through an AXI4-Lite interface and provides the controller interface for asynchronous serial data transfer.

Key Features

  • AXI interface is based on AXI4-Lite specification
  • Hardware and software register compatible with all standard 16450 and 16550 UARTs
  • Supports default core configuration for 9600 baud, 8 bits data length, 1 stop bit and no parity
  • Implements all standard serial interface protocols

Benefits

  • Mature source IP has been re-engineered for full DAL-A compliance for airworthiness and design assurance for safety-critical programs, supporting and simplifying the compliance effort at the FPGA level.

Deliverables

  • Encrypted source along with a complete certification data package (CDP) including all artifacts required for chip-level compliance.

Technical Specifications

Availability
March 2014
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Semiconductor IP