DDR2-PHY compensation block, BOAC; UMC 90nm SP/RVT Low-K Logic process
Overview
DDR2-PHY compensation block, BOAC; UMC 90nm SP/RVT Low-K Logic process
Technical Specifications
Foundry, Node
UMC 90nm
Maturity
Five (5) productions verified
UMC
Pre-Silicon:
90nm
G
,
90nm
LL
,
90nm
SP
Related IPs
- LPDDR3-PHY Command/address block for LightCo ; UMC 40nm LP/RVT Logic Process
- 40nm LPDDR3-PHY Data block for LightCo ; UMC 40nm LP/LVT Logic Process
- High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counters, and two 16-bit dptr; 0.25um UMC Logic process.
- DDR2-PHY compensation block, BOAC; UMC 0.13um HS/FSG process
- DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process
- DDR2-PHY data block with BOAC IO; UMC 90nm SP/RVT Lowk Logic Process