DDR2-PHY Command/Address block; UMC 90nm SP/RVT Lowk Process
Overview
DDR2-PHY Command/Address block; UMC 90nm SP/RVT Lowk Process
Technical Specifications
Foundry, Node
UMC 90nm
Maturity
Mass production proven
UMC
Pre-Silicon:
90nm
G
,
90nm
LL
,
90nm
SP
Related IPs
- DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process
- DDR2-PHY data block with BOAC IO; UMC 90nm SP/RVT Lowk Logic Process
- DDR2-PHY data block; UMC 90nm SP/RVT Lowk Process
- Command/Address Block of DDR3 Combo PHY for DIMM version ; UMC 55nm SP/RVT LowK Logic Process
- Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process
- Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application;UMC 55nm SP/RVT LowK PROCESS.