FlexCFR is a communications standard agnostic, crest factor reduction solution. It is customisable and independent of the target device vendor hence it can be built for any FPGA/SoC or ASIC platform.
Crest Factor Reduction
Overview
Key Features
- Reduces amplifier costs by enabling the use of power transistors with lower peak-power handling.
- Improves amplifier efficiency by increasing the average transmit power relative to the bias power.
- Single or multi-carrier operation, which is dynamically configurable.
- Output signal Peak to Average Power Ratio (PAPR) can be traded against spectral emissions and in-channel performance (e.g. EVM).
- Adaptable for any communications standard via real-time controls.
- Low target resource footprint.
- Compatible with technologies such as Digital Predistortion (DPD) and envelope tracking.
- 100% deterministic behaviour, which facilitates off-line system modelling for performance prediction and optimisation.
Benefits
- Vendor Independent: compiled for your preferred FPGA or silicon vendor.
- Adaptable: can be dynamically re-programmed for operation with any communications standard including multi-carrier composite signals.
- Affordable: licensing terms to suit your business and roadmap.
- Supported: your success with FlexCFR is our core business.
Block Diagram
Technical Specifications
Related IPs
- Peak Cancellation Crest Factor Reduction (PC-CFR)
- Crest Factor Reduction IP
- Crest Factor Reduction IP Core
- Crest Factor reduction IP
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