Charter 0.13um 1.2v APLL
Overview
This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 50MHz to 500MHz. By setting different values of DM(5:0) and DN(6:0) according to different REFIN, CLK will be locked at the multiples of input frequency.
Key Features
- Process: Charter 0.13um Dual-Gate (1.2V/3.3V) Nominal with Multi-Vt Process
- Supply voltage: 1.0v~1.2v~1.32v
- Current: <2.5mA
- Operating temperature: - 40c ~ +25c ~ +125c 3. Block Diagram
Technical Specifications
Foundry, Node
Chartered 0.13um