IP Catalog > Interface IP > Other > Camera Receiver - 5.0Gbps 8-Lane - TSMC 12FFC, 6FFC

Camera Receiver - 5.0Gbps 8-Lane - TSMC 12FFC, 6FFC

Overview

The CL12812M8RIP5000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processor) and DSP. The CL12812M8RIP5000 is designed to support data rate in excess of maximum 5Gbps utilizing SLVS-EC ver.3.0 BG3 interface specification.

This IP is expandable to 8, 16, 24 or more lanes.

Porting is also possible for processes other than the target process.

We can provide the original LINK controller (soft macro) that can be used with this PHY.

Key Features

  • SLVS-EC ver.3.0 BG3 compliant
  • Supporting for Differential Input Signals
    • SLVS-EC (Maximum 5.0Gbps)
  • Xtal Input Clock Frequency Selectable
    • 25MHz /50MHz /75MHz /37.125MHz /54MHz /24MHz /48MHz /72MHz
  • Maximum Output Clock Frequency
    • 5Gbps 250MHz@ Select parallel data bus width to 20bit
  • Power Supply: Vcc=1.8V (IO and Analog)
    • The core voltage is determined by the process node.(Inside Core)
  • Maximum Lane Number: 24-Lane (8-Lane, 16-Lane also available)
    • 20-bit/Lane Parallel Outputs (SLVS-EC)
    • Including Power Down Mode

Technical Specifications

Foundry, Node
TSMC 12FFC, 6FFC
Maturity
Silicon Proven
Availability
Now
TSMC
Silicon Proven: 6nm , 12nm
Request Info

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