Bluetooth Low Energy (BLE) analog PHY

Overview

Key Features

• Leading technology of 55nm LL_RF process.
• Operating junction temperature: -40°C to 85°.
• BLE interface.(rfio)
• Build-in on-chip Buck DC/DC converter(1.8V~3.6V—>1.4V) and Bandgap and LDOs(1.2Voutput dvddcore/vddldo_usb2/vddlco_pll)
• Built in 10bit SAR ADC and 8bit DAC and 5G RF PLL(16MHz reference clock).
• Low power consumption: RX<10mW; TX<12mW@0dBm
• Flexible, Rectangular PHY layout offers industry’s smallest PHY area and is hardened to match IO pad frame.
• Improved long term system reliability

Deliverables

• Datasheet.
• Encrypted Verilog simulation model (ncverilog/vcs)
• .db, .lib, .vg, .lef, .gdsII, .spef, .sdf
• Timing report.

Technical Specifications