Viterbi decoding is an efficient algorithm for decoding convolutionally encoded sequences corrupted by channel noise back to the original sequence. In the digital transmit-receive system shown below the digital data stream (e.g., voice, image, or any packetized data) is encoded, modulated, and transmitted through a wired or wireless channel. A “noise” block connected to the channel symbolically denotes the channel noise. The data received from the channel at the receiver side is first demodulated and then decoded using the Viterbi decoder. The decoded output is equivalent to the transmitted digital data stream.
Lattice's Block Viterbi Decoder IP core is a parameterizable Viterbi Decoder for decoding different combinations of convolutionally encoded sequences. The decoder supports various code rates, constraint lengths, and generator polynomials. It also allows soft-decision decoding and is capable of decoding punctured codes. The core can operate in continuous or block modes, whichever is required by the channel. Either Tail Biting or Zero Flushing convolutional codes can be decoded in the block mode. All the configurable parameters, including operation mode, generator polynomials, punctured block size, and puncture pattern can be defined by the user to suit the needs of their application. The code rate and puncture pattern can also be changed dynamically through input ports during the operation of the decoder. Lattice’s Block Viterbi Decoder IP is compatible with many networking and wireless standards that use different methods of convolutional encoding at the encoder.
Block Viterbi Decoder
Overview
Key Features
- Compatible with IEEE 802.16-2004 SC PHY/ OFDM PHY, IEEEE802.11a, 3GPP, 3GPP2, and DVB standards
- Supports multiple code rates: 1/2, 1/3, ... 1/7 for non-punctured codes, 2/3, 3/4, ..., 12/13 for punctured codes, and from m/(m+1) to m/(2m-1), where m is from 1 to 12, for dynamic punctured codes
- Variable constraint length from 3 to 9
- Supports dynamically variable code rates and puncture patterns
- Dynamic BER estimation option
- One-clock synchronous design
- Hard or parameterizable soft decision decoding. Hard and soft decision for non-punctured codes and soft decision for punctured codes
- Fully parallel or hybrid implementations. For a hybrid implementation, the degree of parallelism is parameterizable
- Parameterizable trace-back length
- Signed and unsigned representations for soft decision data
- Supports parameterized puncturing patterns
- Supports both continuous and block data input
- Supports both Tail Biting and Zero Flushing block convolutional codes
- Supports both one and two traceback schemes to cater to different coding scenarios
Block Diagram
