ASRC-Lite : 16-bit -90dB THD+N Multi-Channel Audio Sample Rate Converter

Overview

The ASRC-lite (CWda50) is part of Coreworks family of multi-channel asynchronous Audio Sample Rate Converter (ASRC). This core can be used to interface digital audio equipments operating at different sample rates. It has been designed for systems that require a low-cost solution, maintaining low harmonic distortion and noise, and a high tolerance and rejection of input jitter.

The ASRC-lite can perform common sample rate conversions with less than -90 dB of Total Harmonic Distortion plus Noise (THD+N) and has a Dynamic range of 92 dB, supporting input data of 16-bit resolution.

The Coreworks ASRC series are implemented to support several key industry interfaces: TDM parallel, TDM serial, Parallel, I2S, SPDIF-AES3.

Coreworks offers a broad range of asynchronous sample rate converters targeted for variety of audio applications.

Key Features

Fully digital audio asynchronous sample rate conversion
Multi-channel audio, configurable up to 8 channels
Automatically adjusts to input and output rate changes
Input and output sample rate range: 8 kHz to 192 kHz
Sampling rate conversion ratios from 1:12 to 7:1
Supports multi-channel TDM serial/parallel audio, I2S, SPDIF, parallel handshaked
High input jitter tolerance (small data bursts) and rejection capability
Latency: 128/FSin + 2/FSout
Lower than -90 dB THD+N for common conversion rates; greater than 92 dB Dynamic Range
Real time reporting of sample rate conversion ratio
Extremely fast synchronization time (128 input sample periods)
Pre-synthesis Clkout configuration from 64xFSout to 1024xFSout

Benefits

Integrating this unique component will eliminate a discrete component in the bill of materials
Support for both FPGA and ASIC with seamless transition
Configurable architecture allows features to be changed upon request

Block Diagram

Applications

Set-top boxes, professional and hi-fi audio
Home Theater Systems
Automotive Audio Systems
Digital Audio Effects Processors
Digital Audio Broadcast Equipment

Deliverables

Verilog source code or FPGA netlist
Verilog testbench for RTL simulation
Synthesis constraints
Datasheet

Technical Specifications

Foundry, Node

All

Maturity

Silicon and FPGA proven

Availability

Now

TSMC

Pre-Silicon: 65nm GP , 90nm G , 130nm G

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