ASIP-2 Programmable Filter Engine

Overview

Application Specific Instruction Set Processors (ASIPs) possess an instruction set which is tailored to benefit a specific application.

They are special-purpose programmable hardware accelerators.

ASIPs fill a sweet spot on the cost-energy-performance continuum between fully software solutions running on DSPs and fully hardware solutions using ASICs or FPGAs.

Key Features

Platform to design Application Specific Instruction Set Processors (ASIPs).
Ideal for supporting multi-standard systems.
Supports a wide range of complex DSP functions
The ASIP2 performs Fast Fourier Transform (FFT) to convert time domain signals to frequency domain signals for further processing. It supports FFT sizes from 4 to 8K.
Supports vector machines, and Linear regression.
The ASIP2 is a super set of ASIP1 (VK-701) developed by Wasiela
Ported C compiler, assembler, linker, and debugger suitable for the two sample targets.
The ASIP2 targets pack up to six independent operations to be executed in parallel in one instruction word of 32~bits.
Ability to easily target other signal processing applications.

Benefits

Flexible
Performance approaches that of dedicated implementations.
Software-like ease.

Block Diagram

Applications

Wired/Wireless MODEMs (DSL, LTE, Zigbee, …).
Image processing.
Artificial intelligence and machine learning.
Speech recognition/Speech synthesis.
Filters, decimators, and interpolators.

Deliverables

Synthesizable Verilog
Ported C compiler
Sample programs
Verilog Test Benches
Documentation

Technical Specifications

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