Application Specific Instruction Set Processors (ASIPs) possess an instruction set which is tailored to benefit a specific application.
They are special-purpose programmable hardware accelerators.
ASIPs fill a sweet spot on the cost-energy-performance continuum between fully software solutions running on DSPs and fully hardware solutions using ASICs or FPGAs.
The ASIP1 is configurable at software compilation as well as at run time as a trade-off between throughput and flexibility.
For example in a FIR filter design, for maximum flexibility and scalability all the parameters of the filter may be loaded from the memory to the design.
This means that there is no fixed parameter after compilation:
filter order is loaded from the memory and also the number of samples.
For maximum throughput, all the parameters may be fixed in the code and stored in internal registers within the ASIP (general purpose registersg0:g7).
In such a case for example, the maximum filter order is 8 for complex signals and 16 for real signals.
