Arm Cortex-M0+
Overview
The Cortex-M0+ processor builds on the very successful Cortex-M0 processor, retaining full instruction set and tool compatibility, while further reducing energy consumption and increasing performance. Along with the Cortex-M0 processor, the exceptionally small silicon area, low power and minimal code footprint of these processors enable developers to achieve 32-bit performance at an 8-bit price point, bypassing the step to 16-bit devices. The Cortex-M0+ processor comes with a wide selection of options to provide flexible development.
Key Features
- Memory protection unit - Software reliability improves when each module is allowed access only to specific areas of memory required for it to operate. This protection prevents unexpected access that may overwrite critical data.
- Binary upward compatible with all other Cortex-M processors - The Cortex-M0+ has mainly 16bit Thumb-2 instructions and few 32bit ones. These instructions are also present on all the other Cortex-M processors. Hence all code written for the Cortex-M0+ will run as is on the other processors.
- Built-in low-power features - Sleep, deep sleep and state retention are three low power modes available to the user.
- Optional Debug Access Port and Serial Wire Debug - For devices where every pin counts the serial wire debug port uses only two pins.
- Optional Micro Trace Buffer - Trace all program flow via an in-memory trace buffer which can be read out via JTAG for later analysis.
Benefits
- Extremely low power. The most energy efficient of all Arm processors. The Cortex-M0+ achieves a power consumption below 4µW/MHz (40LP process, base configuration), while reaching a performance of 2.46 CoreMark/MHz.
- Versatile. The Cortex-M0+ includes optional functionalities that allow designers to reach an optimal fit-for-purpose solution for a broad range of applications. These include the single-cycle I/O interface for faster control, the Micro Trace Buffer (MTB) for enhanced debug, and others which are common to all Cortex-M processors, such as the Memory Protection Unit (MPU) and the relocatable vector table.
- Fast time-to-market. The Cortex-M0+ processor is binary compatible to the Cortex-M0 and is upward binary compatible to all other Cortex-M processors making software re-use a real advantage. Developers also benefit from the Arm partnership’s extensive ecosystem of embedded tools, software, and knowledge base.
Block Diagram
Applications
- MEMS sensors
- Power management
- Digital motor control
- Low power MCUs
- Health wearable monitors
- Environmental monitors