Analog Front End IP for CMOS image processing applications

Overview

FXAFE010HF0A is an Analog Front End IP for CMOS image processing applications. FXAFE010HF0A is fabricated in UMC 55nm SP, low-k, logic process to enable size reduction and utilizes an 8-bit Programmable Gain Amplifier (PGA) with a 2:1 input multiplexer, a 10-bit pipelined analog-to-digital converter (ADC), and a 10-bit offset correction digital-to-analog converter (DAC) to implement a signal processing solution for scanners, video and CMOS imaging applications.

Technical Specifications

Foundry, Node
UMC 55nm Logic/Mixed_Mode SP
UMC
Pre-Silicon: 55nm
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Semiconductor IP