A GlobalFoundries 65nm LPE Wirebond I/O library with 2.5V GPIO, 2Gbps LVDS TX RX and 2.5V Analog/RF cell with associated ESD.
A key attribute of this silicon-proven library include dual selectable drive strengths and independent input & output enable / disable. The GPIO cell can be configured as input, output or open-drain with a Schmitt trigger input and selectable internal 60K ohm pull-up or pull-down resistor. Cells for IO power, core power and ground with built-in ESD are included. 2.5V LVDS RX & TX cells capable of data rates up to 2Gbps with no external reference, along with a 2.5V low-capacitance RF analog cell (and associated ESD) complement the GPIO offering. The library is enriched with filler, corner and domain-break cells to allow for flexible pad ring construction. ESD design targets are 2KV HBM and 500V CDM, yet this library has demonstrated up to 4KV HBM / 800V CDM.
Operating Conditions
Parameter | Value |
VDDIO | 2.5V |
Core VDD | 1.2V |
Tj | -40C to 125C |
MaxLoad | 15pF (10pF at speed) |
Cell Size and Metal Stack
Cell Size | Type | Metal Stack | WB Pitch |
45x200um | GPIO | 1P8M_1B1_1EA | 45um dual |
90x200um | LVDS | 1P8M_1B1_1E |
Library Cell Summary
Cell Type | Feature |
Supply/ESD | 2.5V I/O; 1.2V core; GND |
GPIO | 12mA 24mA (up to 200MHz) |
LVDS TX & RX | 2Gbps, no external reference |
2.5V Analog | Low-capacitance RF |
Break Cells | VDDIO, VDD |
Filler Cells | 1um, 5um |
Corner | Corner Cell |