2.5V GPIO with 2Gbps LVDS RX TX and Analog Cell in GlobalFoundries 65nm LPe

Overview

A GlobalFoundries 65nm LPE Wirebond I/O library with 2.5V GPIO, 2Gbps LVDS TX RX and 2.5V Analog/RF cell with associated ESD.

A key attribute of this silicon-proven library include dual selectable drive strengths and independent input & output enable / disable. The GPIO cell can be configured as input, output or open-drain with a Schmitt trigger input and selectable internal 60K ohm pull-up or pull-down resistor. Cells for IO power, core power and ground with built-in ESD are included. 2.5V LVDS RX & TX cells capable of data rates up to 2Gbps with no external reference, along with a 2.5V low-capacitance RF analog cell (and associated ESD) complement the GPIO offering. The library is enriched with filler, corner and domain-break cells to allow for flexible pad ring construction. ESD design targets are 2KV HBM and 500V CDM, yet this library has demonstrated up to 4KV HBM / 800V CDM.

Operating Conditions

Parameter Value
VDDIO 2.5V
Core VDD 1.2V
Tj -40C to 125C
MaxLoad 15pF (10pF at speed)

Cell Size and Metal Stack

Cell Size Type Metal Stack WB Pitch
45x200um GPIO 1P8M_1B1_1EA 45um dual
90x200um LVDS 1P8M_1B1_1E  

Library Cell Summary

Cell Type Feature
Supply/ESD 2.5V I/O; 1.2V core; GND
GPIO 12mA 24mA (up to 200MHz)
LVDS TX & RX 2Gbps, no external reference
2.5V Analog Low-capacitance RF
Break Cells VDDIO, VDD
Filler Cells 1um, 5um
Corner Corner Cell

 

Key Features

  • GPIO Features
    • 2.5V I/O operation
    • Selectable 12mA/24mA drive strength option
    • Up to 200MHz operation (@24mA, 10pF)
    • Output enable / disable (HiZ when disabled)
    • Input enable / disable (input low when disabled)
    • Schmitt trigger receiver
    • 60K selectable pull-up or pull-down resistor item ESD: 2KV HBM, 500V CDM
  •  LVDS Features
    • 2Gbps TX and RX
    • TX and RX LVDS channels comply with ANSI TIA/EIA-644-A-2001 LVDS Standard

Block Diagram

2.5V GPIO with 2Gbps LVDS RX TX and Analog Cell in GlobalFoundries 65nm LPe Block Diagram

Technical Specifications

Foundry, Node
GlobalFoundries 65nm LPe
TSMC
In Production: 65nm G , 65nm LP
Pre-Silicon: 65nm G , 65nm LP
Silicon Proven: 65nm G , 65nm LP
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