802.11i Wireless Security Cores

Overview

These high performance cores have been designed to provide hardware acceleration of the underlying 802.11 WPA security algorithms, which in combination with the Helion AES-CCM core family, may be used to implement a full 802.11i WPA2 security solution very efficiently in Xilinx FPGA. The security processing is split into two parts, since they are likely to be required at different points within the MAC subsystem.

The Helion WEP/TKIP Encryption engine is a standalone high-speed processing core which is designed to encrypt and decrypt 802.11 MPDU data, based on an underlying ARC4 stream cipher. It includes all the defined keymix processing as well as the MPDU payload encryption/decryption functionality.

The Helion TKIP Michael engine is a standalone high-speed processing core which is designed to accept 802.11 MSDU data and use it to generate a compliant “Michael” authentication tag. The Michael tag is typically appended to an outgoing MSDU for encryption, or compared with a decrypted incoming tag for authentication checking

Key Features

  • Implements WPA security protocol according to IEEE 802.11i standard
  • Standalone WEP/TKIP encryption core intended to work at MPDU level
  • WEP/TKIP encryption core supports key mix processing as well as MPDU payload encryption/decryption ICV status out Michael/State out
  • Standalone TKIP Michael authentication core intended to work at MSDU level
  • TKIP Michael core has optional support for mid-message state unload/reload
  • Supports high data throughputs
  • Highly optimised for use in Xilinx FPGA technologies

Block Diagram

802.11i Wireless Security Cores Block Diagram

Deliverables

  • Target specific netlist or fully synthesisable RTL VHDL/Verilog
  • VHDL/Verilog simulation model and testbench
  • Comprehensive User documentation

Technical Specifications

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Semiconductor IP