Digital ICs that interface to high speed consumer memory interfaces such as mobile DDR receive data and strobe clocks simultaneously. In order to ensure timing and guarantee data-capture, the incoming clocks need to be phase adjusted, typically by 90 degrees. In addition, the strobe clocks appear non- continuously as a method of reducing switching power and hence will require a clock system generation macro to rapidly generate clocks.
Analog Bits DLL macro generates a 90 degree delayed clocks from non-continuous clock strobe. The macro also has a built-in stop capability that allows powering down the analog portions when the incoming clock is idling saving power. Additionally the macro has the ability to perform rapid re-start the clocks with the incoming clocks. The macro is also provided with programmable gate-delays which can be used to compensate for external data-path or clock-tree delays.
Electrical Properties Parameter Units Min Typ Max Comment Reference Frequency MHz 100 400 Frequency of REF, STROBE may be slower.
DDR Performance Mbps 200 800 Reference Duty Cycle % 40 60 Strobe Duty Cycle % 40 60 Duty Cycle Degradation % -2% +2% Lock Time Cycles 512 Cycles of input reference clock from RESET Lock Time Cycles 0 Cycles of input reference clock from coasting Static Phase Error ps -50 +50 DLLOUT rising edge phase error at 325MHz Cycle to Cycle Jitter ps -50 +50 With constant reference frequency and analog grade power supply Operational Voltage V 1.08 1.2 1.32 Operational Temperature C -40 25 125 Table 1: DLL Operational Range