64-bit High performance Quad Core RISC-V Microprocessor

Overview

VEGA AS4161 features a quad core out-of-order processing engine with a 16-stage pipeline for high performance compute requirements. The processor also supports single and double precision floating point instructions, and MMU for Linux based applications. This high-performance application core comes with Instruction Cache, Data Cache and an advanced branch prediction for efficient branch execution. The processor has separate Level 1 Instruction cache and Data cache along with Level 2 Cache facilitating high performance applications such as Media server, Single Board Computer, Storage, and Networking etc.

Key Features

  • RISC-V 64G (RV64IMAFD) ISA
  • 13-16 stage out-of-order pipeline implementation
  • Advanced branch predictor: BTB, BHT, RAS
  • Harvard architecture
  • Privilege Levels : User-, Supervisor- and Machine-mode
  • Fully-featured memory subsystem with Linux support
    • Memory Management Unit
    • Page-based virtual memory
    • Configurable L1 caches
    • Configurable L2 caches
  • High-performance IEEE 754-2008 compliant floating-point unit
  • Vectored interrupt support
  • Platform Level Interrupt Controller
    • Up to 127 IRQs
    • Low interrupt latency
  • AXI4- / ACE, AHB- compliant external interface
    • Advanced Integrated Debug Controller
    • JTAG compliant interface
    • HW/SW breakpoints support
  • Debug extension allowing Eclipse debugging via a GDB >> openOCD >> JTAG connection
  • Linux compatible

Block Diagram

64-bit High performance Quad Core RISC-V Microprocessor Block Diagram

Video

VEGA Processors

VEGA Processor Introduction

Applications

  • Media Server
  • Single Board Computer
  • Storage devices
  • Energy Gateway
  • Electricity Grid and Distribution
  • Building Safety
  • Circuit Breaker
  • Smart Power Socket, Light Switch
  • Networking
  • Medical Imaging
  • Defibrillator
  • Hospital Admission Machine
  • Powered Patient Beds
  • Vital Signs Monitor
  • Biometric access control
  • Public Address Systems

Deliverables

  • RTL Source Code
  • Test Benches
  • Synthesis Scripts
  • Product Specification
  • User Guide
  • Integration Guidelines

Technical Specifications

Foundry, Node
Any
Maturity
FPGA Proven
Availability
Immediate
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Semiconductor IP