4Kx8 Bits OTP (One-Time Programmable) IP, TSMC 0.18µm 1.8V/5V Mixed-Signal Process

Overview

The ATO0004KX8TS180MSS3NA is organized as a 4Kx8 one-time programmable in parallel mode. This is a kind of non-volatile memory fabricated in TSMC 0.18µm standard CMOS mixed-signal process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming, configuration setting, feature selection, and PROM, etc.

Key Features

  • Fully compatible with TSMC 0.18µm mixed-signal process
  • Low voltage: 1.8 V ± 10% read and 3.6 V ± 5% program
  • High speed: 10-µs program time per bit, and 30-ns cycle time to read 8 bits at a time
  • Asynchronous input and latched output
  • One additional row to store any information
  • Built-in test mode to generate pedestrian crosswalk line patterns
  • Wide temperature: -40 °C to 125 °C for READ and program by room temp

Benefits

  • Small IP size
  • Low program voltage/current
  • Low read voltage/current
  • High reliability

Deliverables

  • Datasheet
  • Verilog behavior model and test bench
  • Timing library
  • LEF File
  • Phantom GDSII database

Technical Specifications

Foundry, Node
TSMC 0.18µm 1.8V/5V Mixed-Signal Process
Maturity
Silicon Proven & In Production
Availability
Now
TSMC
Silicon Proven: 180nm FG
×
Semiconductor IP