40nm 1.8V Programmable 1.1V LDO Regulator with 50mA max. output

Overview

The TRV702TSM40LP IP is a 1.8V low-power programmable 1.1V LDO implemented in TSMC Low-Power 40nm CMOS process technology. Its low noise and high-precision makes it especially suitable for use in wireless communication and broadcast integrated circuit subsystems (LTE, WiFi, WiMAX, DAB, DAB+, FM, HDFM, DRM, etc).

Key Features

  • Programmable 0.9V to 1.275V output voltage in 25mV steps
  • 2% LDO output variation across process, supply and temperature
  • Low-Power Sleep Mode (usable when reference TRV701TSM40LP Band-Gap is disabled)
  • 50uA quiescent current

Benefits

  • Low-power and low-noise programmable 1.1V LDO with less than 50uA quiescent current

Block Diagram

40nm 1.8V Programmable 1.1V LDO Regulator with 50mA max. output  Block Diagram

Applications

  • Programmable low-power 1.1V LDO is suitable for embedding in ASIC and SoC subsystems for:
  • LTE, WiFi, WiMAX, DAB, DAB+, FM, HDFM, DRM, and many more applications.

Deliverables

  • Behavioural Models
  • Timing Models
  • GDSII Layout Database
  • Netlist for LVS verification
  • Usage and Integration Guidelines
  • Databook

Technical Specifications

Short description
40nm 1.8V Programmable 1.1V LDO Regulator with 50mA max. output
Vendor
Vendor Name
Foundry, Node
TSMC 40nm CMOS
Maturity
Contact Tetrivis
Availability
GDSII available in January 2015
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Semiconductor IP