4-/8-bit mixed-precision NPU IP

Overview

Features a highly optimized network model compiler that reduces DRAM traffic from intermediate activation data by grouped layer partitioning and scheduling. ENLIGHT is easy to customize to different core sizes and performance for customers' targeted market applications and achieves significant efficiencies in size, power, performance, and DRAM bandwidth, based on the industry's first adoption of 4-/8-bit mixed-quantization.

Performs various operations of deep neural networks such as convolution, pooling, and non-linear activation functions for edge computing environments. This NPU IP far surpasses alternative solutions, delivering unparalleled compute density with energy efficiency (power, performance, and area).

Key Features

Mixed-Precision (4/8-bit) Computation: Higher efficiency in PPAs and DRAM bandwidth
Deep Neural Network (DNN)-optimized Vector Engine: Better adaptation to future DNN changes
Scale-out w/ Multi-core: Even higher performance by parallel processing of DNN layers
Modern DNN Algorithm Support: Depth-wise convolution, feature pyramid network (FPN), swish/mish activation, etc.
High-level Inter-layer Optimization: Grouped layer partitioning and scheduling for reducing DRAM traffic from intermediate data
DNN-layers Parallelization: Efficiently utilize multi-core resources for higher performance & optimize data movements among cores
Aggressive Quantization: Maximize use of 4-bit computation capability

Benefits

NN Converter
- Converts a network file into internal network format (.enlight)
- Supports ONNX (PyTorch), TF-Lite, and CFG (Darknet)
NN Quantizer
- Generates quantized network: float to 4-/8-bit integer
- Supports per-layer quantization of activation and per-channel quantization of weight
NN Simulator
- Evaluates full precision network and quantized network
- Estimates accuracy loss due to quantization
NN Compiler
- Generates NPU handling code for target architecture and network

Block Diagram

Applications

Person, vehicle, bike, traffic sign detection
Parking lot vehicle location detection & recognition
License plate detection & recognition
Detection, tracking, and action recognition for surveillance

Deliverables

RTL design for synthesis
SW toolkits and device driver
User guide
Integration guide

Technical Specifications

Maturity

Production-and market-proven

Availability

Now

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