3GPP SNOW 3G Accelerators

Overview

The SNOW-IP-46 (EIP-46) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as specified by 3GPP and ETSI. Designed for fast integration, low gate count and full transforms, the SNOW-IP-46 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed SoCs for base stations or other equipment requiring 3GPP support.

The SNOW-IP-46 is a family of the cryptographic library elements in the Rambus hardware IP library (formerly of Inside Secure). For example, the SNOW-IP-46 is the cipher core embedded in some PacketEngine-IP-97/196/197 protocol aware security engines. The accelerators include I/O registers, encryption and decryption cores, and the logic for feedback modes and key scheduling.

Sustained performance for any object sizes ranges from 4 to 30 Gbps depending on the configuration, area and frequency. Gate count is 20K to 40K gates depending on the configuration. Supported modes: UEA2, UIA2, 128-EEA1 and 128-EIA1

Key Features

  • Wide bus interface (32-bit data, 128-bit keys) or 32-bit register interface
  • Includes key scheduling hardware
  • Supported modes: UEA2, UIA2, 128-EEA1 and 128-EIA1
  • Fully synchronous design
  • Low Speed, High Speed versions

Benefits

  • Silicon-proven implementation
  • Fast and easy to integrate into SoCs
  • Flexible layered design
  • Complete range of configurations
  • World-class technical support

Block Diagram

3GPP SNOW 3G Accelerators Block Diagram

Deliverables

  • Documentation
    • Hardware Reference and Programmer Manual
    • Integration Manual
    • Verification Specification
  • Synthesizable Verilog RTL source code
  • Self-checking RTL test bench, including test vectors and expected result vectors
  • Simulation scripts
  • Configurations:
    • EIP-44b
      • High-speed, High-frequency
      • 28K gates
      • 32.0 bits/clk
      • up to 1.1 GHz
    • EIP-44c
      • High-speed. Low gate Count
      • 25k gates
      • 32.0 bits/clk
      • up to 720 MHz
    • EIP-44d
      • Medium-speed
      • 20k gates
      • 8.0 bits/clk
      • up to 1 GHz

Technical Specifications

Foundry, Node
Any
Maturity
Silicon Proven
Availability
Now
TSMC
Silicon Proven: 7nm , 16nm , 28nm , 40nm G
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Semiconductor IP