24-bit Cap-less ADC 106 dB SNR low power and low latency 3 channels
Overview
The sADC-uLP-ANC.03 is a mixed (analog and digital) Virtual Component containing three mono ADCs, and additional functions offering an ideal mixed signal front-end for low power, low-latency, fast wake-up and high quality audio applications.
Key Features
- I2C and APB control interface
- Embedded low noise voltage regulator for best resilience to power supply noise
- Low BoM and capacitor-less input connection
- High dynamic range for high quality recording in far-field applications
- Programmable ultra low latency capability
- Fast wake-up suitable for the unique analog VAD WhisperTrigger-A
- Low power mode, ideal for battery powered voice first devices
Block Diagram
Technical Specifications
Foundry, Node
TSMC 40nm uLP
Maturity
In Production
TSMC
In Production:
40nm
G
,
40nm
LP
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