1Kx32 Bits OTP (One-Time Programmable) IP, TSMC 40ULP 1.1/2.5V Process

Overview

The AT1K32T40ULP6AA is organized as a 1K-bit by 32 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSMC 40ULP 1.1/2.5V process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming, configuration setting, feature selection, and PROM, etc.

Key Features

  • Fully compatible with TSMC 40ULP 1.1/2.5V
  • Low voltage: 1.1V+/-10% for read and 2.3V+/-0.1V for program
  • High speed: 10us program time up to 4 bits at the same time
  • Deep sleep mode to cut down power consumption
  • Built-in fuse protection circuits
  • Asynchronous mode with output latches

Benefits

  • Small IP size
  • Low program voltage/current
  • Low read voltage/current
  • High reliability
  • Silicon characterized and qualified

Deliverables

  • Datasheet
  • Verilog behavior model and test bench
  • Timing library
  • LEF File
  • Phantom GDSII database

Technical Specifications

Foundry, Node
TSMC 40ULP 1.1/2.5V Process
Maturity
Silicon Proven & In Production
Availability
Now
TSMC
Silicon Proven: 40nm LP
×
Semiconductor IP