16-bit 2-channel 25 kHz bandwidth delta-sigma stereo, audio DAC

Overview

Delta-sigma stereo, audio DAC contains: reference voltage, control logic, digital buffers I2S interface (ws, sd, sck, gpio), two identical channels L and R: 2-order delta-sigma modulator, current steering DAC, low pass filter, analog buffer. Delta-sigma stereo, audio DAC requires 2.8 ÷3.6 V analog supply, 1.62 ÷ 1.98 V digital supply, reference current 4.95 ÷ 5.05 uA, input clock with duty cycle 45 ÷ 55 %. Delta-sigma stereo, audio DAC supports standby mode. There is the ability to configure the operating modes of the delta-sigma stereo, audio DAC with digital registers: register mode<2:0> controls the modes of the delta-sigma stereo, audio DAC and I2S interface (sd, ws), register mode_sck<2:0> controls the modes of I2S interface (sck), register mode_gpio<2:0> controls the modes of I2S interface (gpio). There is the ability to configure current consumption of the delta-sigma stereo, audio DAC with digital register: register adj_idc_buff<3:0> adjusts current of the analog buffer, register adj_idc_cs<3:0> adjusts current of the current steering DAC, register adj_idc_lpf<4:0> adjusts current of the low pass filter, signal enrc adjusts current of current steering DAC changing linearity of the current steering DAC.
Register adj_idc_cs<3:0> is also controls output voltage peak to peak.

Key Features

  • TSMC 0.18 um SiGe BiCMOS
  • Resolution 16 bit
  • 2-channel
  • Different power supplies for digital and analog parts
  • Sampling rates from 8 to 32 MHz
  • Full power bandwidth up 25 kHz
  • Standby mode (current consumption):
    • 8.9 nA analog parts
    • 5.4 uA digital parts
  • Low-Power Dissipation:
    • 61 mW low impedance mode Rload = 32 Ohm
    • 5.6 mW high impedance mode Rload = 32 kOhm
  • Spurious-free dynamic range:
    • 83 dB low impedance mode Rload = 32 Ohm
    • 76 dB high impedance mode Rload = 32 kOhm
  • Signal-to-noise ratio:
    • 69 dB low impedance mode Rload = 32 Ohm
    • 73 dB high impedance mode Rload = 32 kOhm
  • Compact die area 0.44 mm2
  • Portable to other technologies (upon request)

Applications

  • Portable devices

Deliverables

  • Schematic or NetList
  • Abstract model (.lef and .lib files)
  • Layout view (optional)
  • Behavioral model (Verilog)
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Technical Specifications

Foundry, Node
TSMC BiCMOS SiGe 180 nm
Maturity
silicon proven
Availability
Now
TSMC
Silicon Proven: 180nm
×
Semiconductor IP