14-bit 8-channel 15 to 25 MSPS pipeline ADC

Overview

A block is a pipelined 8-channels ADC, built on a 12 1.5-bit multiplying DAC with sample data storage device and the final block of comparators. Multiplying DAC consists of 1 block mdac1, 2 blocks mdac2, 3 blocks mdac3, 6 blocks mdac4. Blocks mdac1, mdac2, mdac3 differ of power operational amplifier and the nominal resistance of the keys. Block mdac consists of an operational amplifier, a set of 14 keys, performing switching capacitances and the operational amplifier, comparators, and voltage divider to generate the reference level. Block includes two comparators which generate key control signals for switching capacitances, output signals for further processing logic code generation ADC, clock signal for switching key management capacitances, clock signals for the circuit to ensure the necessary level of common-mode operational amplifier. In the module supply voltage divider values of resistors and filter capacitances define power of operational amplifier, which forms the reference levels.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.

Key Features

  • iHP SGB25V
  • Resolution 14 bit
  • Sampling frequency 15-25 MHz
  • Low power consumption in standby mode
  • Low power dissipation (150-450 mW)
  • High values of signal/noise ratio (60 dB)
  • Spurious-free dynamic range 60 dB
  • 8 channels
  • Portable to other technologies (upon request)

Applications

  • Optical networking
  • Test equipment
  • Portable ultrasound and digital beam-forming systems
  • Telecommunication systems
  • Higher quality imaging in video systems

Deliverables

  • Schematic or NetList
  • Abstract model (.lef and .lib files)
  • Layout view (optional)
  • Behavioral model (Verilog)
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Technical Specifications

Foundry, Node
iHP SiGe BiCMOS 0.25 um
Maturity
silicon proven
Availability
Now
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Semiconductor IP