10 bit, 2.5 GSPS ADC

Overview

The ODT-ADS-10B2P5G-T16 is an ultra low-power,high-performance time-interleaved ADC designed in a 16nm CMOS process. This 10-bit, 2.5GSPSADC supports input signals up to 1.0GHz and features a differential full-scale range of 1.0Vpp with excellent static and dynamic performance. The ADC architecture is optimized to maximize performance while minimizing power and area consumption. The ADC input is buffered by an optional input buffer and then distributed to time-interleaved ADC channels.The ADC includes built in calibration to remove time interleaving artifacts, including offset mismatch, gain mismatch and timing skew.To maximize SNR, the ADC includes an ultra-low-jitter clock distribution network with aperture jitter of 150fsrms.

Key Features

  • Ultra low-power, high-performance ADC
  • 10-bit ADC resolution
  • Sampling rate up to 2.5GSPS
  • Fully differential operation
  • 1.0Vpp differential input signal range
  • In-band SFDR of 57dBc
  • SNDR up to 50dB
  • Internal calibration circuitry to correct time-interleaving errors
  • Power dissipation scalable with sampling rate

Benefits

  • High Performance Low Power, Low Area

Applications

  • General purpose software defined radio
  • High speed data acquisition systems
  • Cellular base station
  • Broadband communications
  • High-speed medical imaging
  • Wideband satellite receiver

Deliverables

  • Datasheet
  • Hard Macro (GDSII)
  • Characterization Report (as applicable)
  • Abstract View (LEF) for top level connectivity
  • Integration and Customer Support

Technical Specifications

Maturity
Silicon Characterized
Availability
Now
TSMC
Pre-Silicon: 16nm
×
Semiconductor IP