10/100/1000 base T ethernet Phy

Key Features

  • IEEE 802.3-2008, IEEE 802.3az fully standards compliant
  • IEEE 1588-2008 support
  • BroadR-Reach™ support
  • Dual port MAC interface:
    • GMII (10/100/1000BASE-T)
    • MII (10/100BASE-T).
  • Auto-negotiation support
  • Automatic detection and correction of pair swaps (Auto-MDIX), pair skew and pair polarity
  • 6 different operating modes:
    • 1000BASE-T Full Duplex and Half Duplex
    • 100BASE-TX Full Duplex and Half Duplex
    • 10BASE-T Full Duplex and Half Duplex
  • Management interface
  • Baseline wander compensation
  • On-chip transmit wave-shaping
  • On-chip hybrid circuit
  • 10KB jumbo frames
  • Internal, external and remote loop back
  • Hardware configuration for default operation
  • Power down mode,interrupt support
  • IEEE 1500 support for SoC testing integration
  • LED indication: link mode, status, speed, activity, and collision
  • Technology: TSMC 28nm HPC+
  • IP Size: 2070 x 925 squm pre-shrink

Block Diagram

10/100/1000 base T ethernet Phy Block Diagram

Technical Specifications

Foundry, Node
TSMC 28nm HPC+
TSMC
Pre-Silicon: 28nm HPCP
×
Semiconductor IP