1.6T Ethernet UMAC

Overview

The Universal Media Access Controller (UMAC) ensures efficient data flow, low latency, and optimized power usage. CoMira Solutions Inc. introduces the 1.6T Ethernet UMAC IP, an advanced Ethernet MAC IP core designed to meet the demanding requirements of data centers and high-performance network systems.

The 1.6T Ethernet UMAC is designed for flexibility and supports multi-channel and multi-rate configurations, enabling efficient scalability across diverse network environments.

At its core, the 1.6T Ethernet UMAC integrates advanced MAC (Media Access Control), PCS (Physical Coding Sublayer), and FEC (Forward Error Correction) logic, delivering a versatile and high-performance networking solution.

Built according to the IEEE 802.3dj Ethernet standards, CoMira’s 1.6T Ethernet UMAC is a comprehensive, scalable, and energy-efficient solution that enables seamless, high-bandwidth communication for tomorrow’s connected world and today’s most data-intensive applications.

Key Features

  • Simple programming and bringing up sequence matching previous UMAC generations
  • Support for arbitrary mixed modes across channels and dynamic mode switching
  • Support for 224G SerDes
  • Standard and priority pause generation, termination, and pass-through
  • Support for jumbo frames up to 16K bytes
  • TX runt frame padding and RX runt frame stripping
  • Counters and interrupts for MIBs and various MAC and PCS/FEC events
  • Support for Ethernet Technology Consortium RS(272,257+1) low latency FEC in all modes that support RS(544,514)
  • Programmable alignment marker periods and values
  • Programmable SerDes bit error injection for simple FEC testing
  • Programmable per-channel xMII TX->RX loopback and per-SerDes lane TX->RX parallel loopback
  • Independent TX and RX programmable any-to-any SerDes lane remapping

Benefits

  • Effortless Bandwidth Scaling: 1.6T Ethernet UMAC IP effortlessly supports massive data demands for AI, ML, and hyperscale cloud environments.
  • High Reliability: The built-in FEC and seamless error handling of 1.6T UMAC IP ensure consistent, high-quality data streams.
  • Future-Ready Design: The Ethernet 1.6T UMAC IP complies with the latest Ethernet standards, ensuring seamless long-term interoperability.
  • Efficient Resource Utilization: 1.6T UMAC reduces overall operational costs with lower power consumption and footprint.
  • Ease of Integration: the 1.6T UMAC IP's flexible architecture and simple setup procedure enable quick deployment across diverse hardware platforms.

Block Diagram

1.6T Ethernet UMAC Block Diagram

Applications

  • Data Centers: The solution provides the necessary throughput for large-scale cloud data centers that require massive bandwidth and low-latency interconnects to handle growing amounts of data.
  • Artificial Intelligence (AI): AI workloads demand significant data bandwidth, and the 1.6T Ethernet UMAC is designed to support these applications. This IP product ensures real-time data transfers and rapid model training.
  • Telecom Networks: The 1.6T Ethernet UMAC supports future telecom infrastructures and enables seamless, high-speed data transfers between base stations and central offices.
  • High-Performance Computing (HPC): The 1.6T Ethernet UMAC is ideal for HPC clusters and provides high throughput. High performance is a requirement to process simulations and data analytics at a supercomputing scale.
  • Cloud Storage & Networking: The Ethernet solution supports cloud services. It ensures efficient data handling for enterprise storage, content delivery networks, and other cloud-based applications.
  • Broadcasting & Media: With jumbo frame support and minimal latency, the 1.6T Ethernet UMAC is ideal for high-definition video and media delivery, providing seamless streaming and content delivery.

Deliverables

  • System verilog design RTL.
  • IPXACT views for register maps.
  • ASIC Integration guide (AIG) for the ASIC implementers.
  • ASIC Constraints and supporting information.
  • Core Functional Specification.
  • Programmers Guide (PG) and register specification Relevant Application notes.

Technical Specifications

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Semiconductor IP