350AMS_LNA_04 is a common receiver front-end device which is used to provide impedance matching to off-chip circuits and to perform first step low noise amplification to overcome noise of subsequent receiver stages.
This IP is two-stage LNA matched to 50Ohms at input and output both. The first stage is based on common-emitter amplifier with cascode and LC-resonant load with 1235MHz or 1590MHz center frequency modes, which are selected by logic level at SB input. To make input matching, external L-type matching network required. The second cascade is emitter follower which increases power gain and provides wideband output matching without any external components.
1.16 to 1.26 and 1.56 to 1.61 GHz low noise amplifier with 27.5dB gain
Overview
Key Features
- AMS SiGe BiCMOS 0.35um
- Operating frequency range from 1164 to 1257 MHz and 1565 to 1614 MHz
- High gain (28 dB)
- Low noise figure (less than 2 dB)
- Supply voltage 3.0V
Applications
- Front-end LF signal amplification in receivers
- Navigation receivers
Deliverables
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Technical Specifications
Foundry, Node
AMS SiGe BiCMOS 0.35um
Maturity
Silicon proven
Availability
Now
Related IPs
- Single stage low noise amplifier from 2-6 GHz with flat gain, low Noise Figure, high isolation, stability.
- 0.7-3 GHz Low noise amplifier
- 2 to 6 GHz Low Noise Amplifier
- 1.7 to 2.5 GHz PCS/WCDMA band Low Noise Amplifier
- 5 GHz Low Noise Amplifier
- 2D (vector graphics) & 3D GPU IP A GPU IP combining 3D and 2D rendering features with high performance, low power consumption, and minimum CPU load