IPsec and TLS Engine IP
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IPsec and TLS Engine IP
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19
IPsec and TLS Engine IP
from 9 vendors
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10)
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Message filter
- Message filters are placed in the middle of a TCP / TLS session to scan application data, and discard unwanted messages and security-issue packets, reducing unnecessary traffic without increasing CPU load or latency.
- Unlike filters by IP address or port, which scan the data content and discard or pass through packets, DPI (Deep Packet Inspection) and other methods tend to cause CPU processing load and packet processing delays.
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SSL/TLS Offload Engine
- Our SSL/TLS engine accelerates and offloads processing for encryption / decryption and authentication in SSL / TLS by combining our TCP offload and crypt engine.
- Since the record layer processing is completely hardware offloaded, the user application can overwhelmingly reduce the CPU load which only needs preparing the data to transfer securely.
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TLS Handshake Hardware Accelerator
- RSA, ECC and more
- > 1 GHz in 16nm
- 400-500 MHz on mid-range/high-end FPGA
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Crypto Coprocessor (Compact)
- The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC.
- Symmetric operations are offloaded very efficiently as it has a built-in scatter/gather DMA. The coprocessor can be used to accelerate/offload IPsec, VPN, TLS/SSL, disk encryption, or any custom application requiring cryptography algorithms.
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Crypto Coprocessor (Premium)
- The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC.
- Symmetric operations are offloaded very efficiently as it has a built-in scatter/gather DMA. The coprocessor can be used to accelerate/offload IPsec, VPN, TLS/SSL, disk encryption, or any custom application requiring cryptography algorithms.
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Crypto Coprocessor (Standard)
- The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC.
- Symmetric operations are offloaded very efficiently as it has a built-in scatter/gather DMA. The coprocessor can be used to accelerate/offload IPsec, VPN, TLS/SSL, disk encryption, or any custom application requiring cryptography algorithms.
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Network Security Crypto Accelerator
- Scalable architecture & crypto engines for optimal performance/resource usage
- Configurable for perfect application fit
- 100% CPU offload with low latency and high throughput
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TLS - Validates TLS protocols to ensure secure, encrypted data transmission
- TLS Verification IP (VIP) ensures secure communication by validating TLS protocol implementations. It simulates handshake processes, tests encryption, and verifies data integrity to protect against cyber threats during data transmission.
- This product finds application in web browsing, email security, VPNs, cloud services, mobile apps, and more. It safeguards sensitive data across various platforms, ensuring end-to-end encryption and robust protection in diverse network environments
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IPsec Engine
- Can aggregate several 10, 40 or 100 GBE link
- Throughput from 10 Gbps up to 100 Gbps
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Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
- Protocol aware IPsec, SSL, TLS, DTLS, 3GPP and MACsec Packet Engine with virtualization, caches classifier and Look-Aside interface for multi-core application processors
- 5-10 Gbps, programmable, maximum CPU offload by classifier, supports new and legacy crypto algorithms, AMBA interface
- Supported by Driver development kit, QuickSec IPsec toolkit, Linaro ODP, DPDK, Linux Crypto
