secure connection engine IP

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Compare 7 IP from 6 vendors (1 - 7)
  • RSA-ECC High-Performance Multi Public Key Engine
    • RSA, ECC and more
    • > 1 GHz in 16nm
    Block Diagram -- RSA-ECC High-Performance Multi Public Key Engine
  • Multi-Protocol Engine, Look-Aside, 1 Gbps
    • Protocol-aware IPsec/TLS packet engine with Look-Aside interface for IoT.
    • Up to 1 Gbps, lowest gate count in the industry, just 100K gates (ex AMBA interface).
    • Supported by Driver Development Kit, QuickSec IPsec toolkit, Secure Boot Toolkit.
    Block Diagram -- Multi-Protocol Engine, Look-Aside, 1 Gbps
  • TLS Handshake Hardware Accelerator
    • RSA, ECC and more
    • > 1 GHz in 16nm
    • 400-500 MHz on mid-range/high-end FPGA
    Block Diagram -- TLS Handshake Hardware Accelerator
  • IPsec Security Processor
    • Support for IPv4 and IPv6 packets
    • Support for the IPsec ESP and AH protocols:
    • Support for IPsec ESP encryption algorithms per RFC 4835:
    • Support for IPsec ESP (and AH for –AH option) authentication algorithms per RFC 4835:
  • IP platform for intelligence gathering chips at the Edge
    • High performance IoT solutions for AI at the Edge can now be created up to 30% faster
    Block Diagram -- IP platform for intelligence gathering chips at the Edge
  • USB-C 3.1/DisplayPort 1.4 IP Subsystem Solution
    • Built from USB-IF certified DesignWare USB 3.1 solution
    • Built from VESA certified DesignWare DisplayPort 1.4 Tx solution
    • Single delivery with a single top-level view of subsystem
    • Industry’s only USB Type-C IP solution consisting of USB-C 3.1/DisplayPort 1.4 TX PHYs, USB-C 3.1/DisplayPort 1.4 TX controllers with HDCP 2.2 and HDCP 1.4 content protection, verification IP, and IP subsystems
    Block Diagram -- USB-C 3.1/DisplayPort 1.4 IP Subsystem Solution
  • Via-PUF Security Chip for Root of Trust
    • The vPUF® IP, powered by Via PUF (Physically Unclonable Function) technology, provides a unique silicon fingerprint for inborn identity function, essential for the Root of Trust in security applications

    Block Diagram -- Via-PUF Security Chip for Root of Trust
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Semiconductor IP