USB 3.1 Gen 2 IP

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Compare 3 IP from 3 vendors (1 - 3)
  • Block Diagram -- eUSB 3.1 Gen 2 Device Controller - Software Enumeration, FIFO Interface
  • USB Type-C and Power Delivery Verification IP
    • Compliant with standard USB PD Rev 3.1 V1.8, Type-C Rev2.2 & USB type C Port controller interface Rev2.0 V1.3.
    • Supports enabling USB4 (Gen 2/Gen 3/Gen 4) over type C Connectors.
    • Supports both Standard Power range (SPR) and Extended Power range (EPR) modes of operation.
    • Supports all Fixed voltage supply, Programmable power supply (PPS) and Adjustable Votlage supply (AVS).
    Block Diagram -- USB Type-C and Power Delivery Verification IP
  • Multi-Standard SerDes PHY
    • Configurable parallel data rate of 8 /10 / 16 / 20 / 32 / 40 / 64 / 80
    • Input reference 5MHz to support 2.5/5/10G data rates
    • Tight control over termination resistor (~50 Ohm) with on chip calibration
    • Tight skew control of 1UI between lanes of the PMA
    • Multi-tap Tx Finite Impulse Response (FIR) equalizer with multi-level de-emphasis
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Semiconductor IP