IP Catalog > Post-quantum Cryptography

Post-quantum cryptography IP

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Compare 21 IP from 11 vendors (1 - 10)
  • Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
    • The Crypto Coprocessors are a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC.
    • Symmetric operations are offloaded very efficiently as it has a built-in scatter/gather DMA. The coprocessors can be used to accelerate/offload IPsec, VPN, TLS/SSL, disk encryption, or any custom application requiring cryptography algorithms.
    Block Diagram -- Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
  • Post-Quantum Cryptography Processor
    • PQPlatform-CoPro (PQP-HW-COP) adds PQShield’s state-of-the-art post-quantum cryptography (PQC) to your security sub-system, with optional side-channel countermeasures (SCA).
    • PQPlatform-CoPro can be optimized for minimum area as part of an existing security sub-system.
    • PQPlatform-CoPro is designed to be run by an existing CPU in your security system, using PQShield’s supplied firmware.
    Block Diagram -- Post-Quantum Cryptography Processor
  • Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
    • Turn-key implementations of the NIST FIPS recommended CRYSTALS post-quantum for key encapsulation (KEM) and digital signature algorithm (DSA)
    Block Diagram -- Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
  • Post-Quantum Cryptography IP: Crystals Kyber - Crystals Dilithium - XMSS - LMS
    • 512 and/or 768 and/or 1024-bit secret key length
    • Implementation protected against Side-Channel Attacks (Key Generation and Key Decapsulation operations are sensitive):
    • Hybrid hardware-software tunable solution
    • Tunable in performance or power/area
  • Lattice-based Post-Quantum Cryptography Processing Engine
    • PQC(post-quantumcryptography) engine
    • NISTSP800-56Acomplaint
    • NISTFIPS186-4and186-5compliant
    • ANSSIX9.142-2020compliant
    Block Diagram -- Lattice-based Post-Quantum Cryptography Processing Engine
  • Dilithium IP Core
    • Dilithium IP Core is a post-quantum digital signature algorithm (DSA).
    • It currently supports Sign and Verify functions, with key generation functionality planned for future implementation.
    • This IP is compliant with Dilithium specification submitted on round 3 of NIST Post-Quantum Cryptography Standardization process.
    Block Diagram -- Dilithium IP Core
  • Falcon IP Core
    • Falcon IP Core is a post-quantum digital signature algorithm (DSA).
    • It is currently under development. It is going to be compliant with Falcon specification submitted on round 3 of NIST Post-Quantum Cryptography Standardization process.
    • Additionally, Falcon IP Core will be enhanced to achieve compliance with NIST Falcon Standart when it is released. 
    Block Diagram -- Falcon IP Core
  • KYBER IP Core
    • supports encapsulation and decapsulation operations
    • supports all modes K=2,3,4.
    • is compliant with Kyber specification round 3.
    • has fully stallable input and output interfaces. 
    • Key generation feature is going to be implemented in the near future.
    Block Diagram -- KYBER IP Core
  • Root of Trust (RoT)
    • Large Silicon Footprint: Open-source RoTs typically require significant silicon area, making them impractical for size-constrained devices.
    • High Energy Consumption: Existing solutions often consume excessive power, limiting their adoption in low-power environments like IoT devices.
    • Lack of Future-Proofing: Emerging security demands, such as Post-Quantum Cryptography (PQC), are frequently overlooked by current designs.
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