Puf IP

Proven “Soft” PUF implementation for AMD/Xilinx FPGAs, part of the FPGA configuration file
Offers FPGA users a cryptographic technology to secure their own keys and to authenticate devices and communications between them on networks.
Enables remote “brownfield” installation of hardware-based security

Synopsys AP PUF is a physical unclonable function (PUF)-based RoT component that can be applied easily to almost any MCU/SoC/ASIC and is fab and process agnostic.
This IP has been developed following an ISO 26262 functional-safety-compliant flow and meets the ISO 26262 Automotive Safety Integrity Level (ASIL) B fault metric.

Synopsys AP PUF is a physical unclonable function (PUF)-based RoT component that can be applied easily to almost any MCU/SoC/ASIC and is fab and process agnostic.
This IP has been developed following an ISO 26262 functional-safety-compliant flow and meets the ISO 26262 Automotive Safety Integrity Level (ASIL) B fault metric.

Most flexible and scalable PUF-based security solution for new and existing designs
Uses standard SRAM as a physical unclonable function (PUF) to create a hardware-based trust anchor which can be installed later in the supply chain, or even retrofitted on deployed devices
Offers key provisioning, secure key storage, symmetric and asymmetric key cryptography, and data encryption on the fly
Easy and collision-free identification of billions of devices (from various vendors)

The PUF Premium is the world’s first IP solution to be awarded “PSA Certified Level 3 RoT Component and SESIP Level 3.” This certifies that the IP includes substantial protection against both software and hardware attacks. It allows chip designers to fast-track their products for full PSA Level 3 certification and further helps ensure supply chain integrity, chiplet security, and protection against reverse engineering.
Certification is essential for security-critical IoT market verticals, such as healthcare, critical infrastructures, and smart consumer products, as outlined in the US Cyber Mark Program.

SGC21549_IP007702_GF_22FDX is a digitally controlled RC based oscillator with embedded Physically Unclonable Function (PUF) implementation
Optimized for systems with security features, it offers high temperature stability and ultra-low power consumption, making use of a RC dependent oscillator topology
Designed for 100kHz, it is the best solution for low-cost identification and secure authentication applications due to its 64-bit input PUF with 128-bit raw output
It is specified from Tj = -40°C to +125 °C.

Proven and mature PUF solution and world’s first IP to be awarded “PSA Certified Level 3 RoT Component and SESIP Level 3”
Uses standard SRAM power-up values as a PUF and is quantum safe
Offers key provisioning, wrapping, and unwrapping to enable secure key storage across the supply chain and for the entire lifetime of the device
Keys are never stored, but re-created from the PUF each time they are needed, offering a higher level of security than traditional key storage in NVM

Proven “Soft” PUF implementation for AMD/Xilinx FPGAs, part of the FPGA configuration file
Offers FPGA users a cryptographic technology to secure their own keys and to authenticate devices and communications between them on networks.
Enables remote “brownfield” installation of hardware-based security
Offers key provisioning, wrapping, and unwrapping to enable secure key storage across the supply chain and for the lifetime of the device

Most flexible and scalable PUF-based security solution for new and existing designs
Uses standard SRAM as a physical unclonable function (PUF) to create a hardware-based trust anchor which can be installed later in the supply chain, or even retrofitted on deployed devices
Offers key provisioning, secure key storage, symmetric and asymmetric key cryptography, and data encryption on the fly
Easy and collision-free identification of billions of devices (from various vendors)

A physical unclonable function, or PUF, is a "digital fingerprint" that serves as a unique identity for a semiconductor device such as a microprocessor
PUFs are based on physical variations which occur naturally during semiconductor manufacturing, which makes it possible to differentiate between otherwise identical semiconductors
The PUF IP consists of PUF array and control logic

PUF IP