PCI Express 6.0 TSMC N5 IP

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Compare 6 IP from 1 vendors (1 - 6)
  • 112G PHY G2, TSMC N5 x4, North/South (vertical) poly orientation
    • Supports 1.25 to 112 Gbps data-rate
    • Supports PCI Express 6.0, 1G to 400G/800G Ethernet, CCIX, CXL, JESD204C, CPRI, SATA, and OIF CEI LR/MR/VSR Electrical Interfaces protocols
    • Supports x1 to x16 macro configurations with aggregation and bifurcation
    • Spread Spectrum Clock (SSC) support for PCIe
    Block Diagram -- 112G PHY G2, TSMC N5 x4, North/South (vertical) poly orientation
  • 112G VSR PHY, TSMC N5 x8, North/South (vertical) poly orientation
    • Supports 1.25 to 112 Gbps data-rate
    • Supports PCI Express 6.0, 1G to 400G/800G Ethernet, CCIX, CXL, JESD204C, CPRI, SATA, and OIF CEI LR/MR/VSR Electrical Interfaces protocols
    • Supports x1 to x16 macro configurations with aggregation and bifurcation
    • Spread Spectrum Clock (SSC) support for PCIe
    Block Diagram -- 112G VSR PHY, TSMC N5 x8, North/South (vertical) poly orientation
  • 112G PHY, TSMC N5 x2, North/South (vertical) poly orientation
    • Supports 1.25 to 112 Gbps data-rate
    • Supports PCI Express 6.0, 1G to 400G/800G Ethernet, CCIX, CXL, JESD204C, CPRI, SATA, and OIF CEI LR/MR/VSR Electrical Interfaces protocols
    • Supports x1 to x16 macro configurations with aggregation and bifurcation
    • Spread Spectrum Clock (SSC) support for PCIe
    Block Diagram -- 112G PHY, TSMC N5 x2, North/South (vertical) poly orientation
  • 112G VSR PHY, TSMC N5 x2, North/South (vertical) poly orientation
    • Supports 1.25 to 112 Gbps data-rate
    • Supports PCI Express 6.0, 1G to 400G/800G Ethernet, CCIX, CXL, JESD204C, CPRI, SATA, and OIF CEI LR/MR/VSR Electrical Interfaces protocols
    • Supports x1 to x16 macro configurations with aggregation and bifurcation
    • Spread Spectrum Clock (SSC) support for PCIe
    Block Diagram -- 112G VSR PHY, TSMC N5 x2, North/South (vertical) poly orientation
  • 112G LRM PHY, TSMC N5 x2, North/South (vertical) poly orientation
    • Supports 1.25 to 112 Gbps data-rate
    • Supports PCI Express 6.0, 1G to 400G/800G Ethernet, CCIX, CXL, JESD204C, CPRI, SATA, and OIF CEI LR/MR/VSR Electrical Interfaces protocols
    • Supports x1 to x16 macro configurations with aggregation and bifurcation
    • Spread Spectrum Clock (SSC) support for PCIe
    Block Diagram -- 112G LRM PHY, TSMC N5 x2, North/South (vertical) poly orientation
  • 112G LR-Max Ethernet PHY for TSMC N5
    • Supports 1.25 to 112 Gbps data-rate
    • Supports PCI Express 6.0, 1G to 400G/800G Ethernet, CCIX, CXL, JESD204C, CPRI, SATA, and OIF CEI LR/MR/VSR Electrical Interfaces protocols
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