MIPI DSI-2 IP
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42
IP
from 11 vendors
(1
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10)
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MIPI DSI-2 Transmitter v1.1 Controller IP, Compatible with MIPI D-PHY & C-PHY
- Compliant with MIPI DSI-2 Standard v0.8.x, MIPI D-PHY Standard v1.x, MIPI D-PHY Standard V2.x and MIPI C-PHY V1.x
- Up to 3 Gsps per trio using C-PHY. 17Gbps in 3 Trios
- Up to 2.5 Gbps per data lane of D-PHY (V2.0). 10Gbps in 4 Lanes
- Programmable 1, 2, 3 (C-PHY) or 4 (D-PHY) Data Lane Configuration
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MIPI DSI-2 Transmit Controller v1.0
- Fully compliant to MIPI standard
- Small footprint
- Code validated with Spyglass
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MIPI DSI-2 RX Controller
- Compliant with the following specifications: MIPI DSI-2 Specification v1.1; MIPI D-PHY Specification v2.0, 4 D-PHY data lanes; Display Command Set (DCS) Specification v1.3 and APB Specification v3.0
- Supports ULPS/LPDT/BTA mode
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MIPI DSI-2 TX Controller
- Compliant with the following specifications: MIPI DSI-2 Specification v1.1, MIPI D-PHY Specification v2.0, 4 D-PHY data lanes, Display Command Set (DCS) Specification v1.3 and APB Specification v3.0
- Supports ULPS/LPDT/BTA mode
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MIPI DSI-2 Receiver Controller v2.0
- DSI-2 Controllers Support
- • MIPI specification of Display Serial Interface (DSI) v2
- • MIPI specification of D-PHY
- • MIPI specification of C-PHY
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MIPI DSI-2 Transmit Controller v2.0
- Fully compliant to MIPI standard
- Small footprint
- Code validated with Spyglass
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MIPI DSI-2 with VESA DSC
- Fully compliant to MIPI and VESA standards
- Small footprint
- Code validated with HAL and 0-in-CDC
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MIPI DSI-2 Controller Core
- Fully DSI-2 standard compliant
- 64 and 32 bit core widths
- Host (Tx) and Peripheral (Rx) versions
- 1-8, 2.5+ Gbit/s D-PHY data lane support
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MIPI DSI-2 Receiver Controller v1.0
- Compliant with the following MIPI specifications
- DSI Host-side interface supports
- Display Panel Connectivity and video/command processing